The invention relates to a switching network for a communication system. The network is structured like a space-division multiplex switching network comprising m/1 stages which include auxiliary lines and each have a trunk line. In the network cells are transmitted in accordance with a time-division multiple access method. The cells are switched through on the basis of the routing information contained in the cell header. The cell arriving at the auxiliary line is written into the buffer dedicated to the trunk line if the routing information and address of this trunk line match. A decision circuit is included. The switching network is specifically suitable for use with asynchronous time-division multiple access methods.
The amount of data traffic to be transmitted through communication networks is ever increasing. In order to manage the data traffic separate switching systems were constructed for data traffic and telephone traffic. Since the data rates of the data signals to be transmitted may assume a multiplicity of different values it is hard to combine data switching and telephone switching in a single network junction.
In European Patent Application having publication number 0 183 592 a wideband transmission system was proposed in which messages are subdivided into cells and transmitted over wideband transmission links according to an asynchronous time-division multiple access method. The cells may have the same length or different lengths. They consist of useful information as well as address information, the address information being accommodated in a header. The number of bits of a cell is designated as its length while values between 120 and 256 bits are proposed as standard cell lengths for the useful information and 32 or 16 bits for the header. The time intervals in which cells are transmitted are designated as frames. A frame may be empty or comprise a valid cell. Between two subscribers of the wideband transmission system there is a virtual connection which is maintained in that the cells sent by the subscriber arrangements comprise unique header codes, enabling the switching junctions to transport the cells correctly. The cells arriving at the junction from an incoming line are transmitted over an outgoing line by conversion of the header. As two or more cells may arrive for the same outgoing line during a single frame, so-called queue buffers are to be provided at the switching junction. One or more of these cells will be buffered in the queue buffer for the time being until a free frame is available.
In view of the queue buffer arrangement the switching junctions of centrally buffered systems (as known, for example, from European Patent Application having the publication number 0 183 592) or systems which are buffered decentrally. With centrally buffered systems there is only a single buffer in which each incoming line delivers its cells and from which each outgoing line again reads the cells meant for it. Systems having a decentralized buffering are distinguished in that cells are exclusively buffered on the input side or in that buffers are exclusively arranged on the output side or in that systems are concerned having input and output buffering. In this context also switching network buffering is referred to when a buffer is assigned to each junction of a switching network.
In DE-PS 38 23 8870.6 is proposed a switching network comprising m/1 stages. Analogous to a space-division multiplex switching network auxiliary lines are arranged in the rows and trunk lines in the columns, whilst to each m/1 stage m auxiliary lines and one output line are connected. To each auxiliary line of an m/1 stage is assigned its own evaluation logic for evaluating the information contained in the header. Each auxiliary line is connected to a buffer accommodating the cells supplied thereto through the auxiliary line insofar as a comparator dedicated to the buffer has established that the address of the trunk line stored in an address memory matches the routing information contained in the header. If cells simultaneously occur at various auxiliary lines of an m/1 stage and are intended for the trunk line of this stage, these cells can also be transported simultaneously to the buffer. However, they can only be read from the memory and written onto the trunk line sequentially. For this purpose each m/1 stage is assigned a decision circuit which determines the order of the trunk lines to be switched through. The order is determined by the spatial arrangement of the trunk lines. If various cells arrive at an auxiliary line of an m/1 stage, which are intended for the trunk line of this stage and are stored in a queue in the buffer, this will also be taken into account.